CMOS circuits have been the workhorse of ICT for 40 years. Due to the unique scaling property of this technology, energy efficiency has enormously improved during that time, notably by lowering the supply voltage from the long-time standard of 5 to 1 V and less. As the era of “happy scaling” has come to an end, progress becomes increasingly difficult and techniques beyond 2D size reductions have come into play. A superior and viable alternative to CMOS has yet to be found.